1. Field of the Invention
The present invention relates to a test signal generation circuit and a reception circuit having the test signal generation circuit.
2. Description of Related Art
In a super-heterodyne type receiver, the reception characteristics such as a reception sensitivity and image interference characteristics are degraded if the following frequency relations are not satisfied:                fRX=fLO−fIF . . . for medium wave broadcasting (AM broadcasting), and        fRX=fLO+fIF . . . for FM broadcasting, wherein                    fRX: reception frequency,            fLO: local oscillation frequency, and            fIF: intermediate frequency.                        
A test signal generator is therefore provided for checking and adjusting the center frequency of an antenna tuning circuit, the center frequency of an intermediate frequency filter (hereinafter called “reception frequency and intermediate frequency” and the like).
This test signal generator can be configured by a PLL (Phase Locked Loop) circuit such as shown in FIG. 4. Namely, an oscillation signal at a stable frequency f1 is derived from a crystal oscillation circuit 1, thus derived oscillation signal is frequency-divided into a signal S1 having a 1/m (m is an integer of 2 or larger) in frequency by a frequency dividing circuit 2, and the signal S1 is supplied to a phase comparison circuit 3. Further, an oscillation signal S4 is derived from a VCO (Voltage Controlled Oscillator) 4, thus derived oscillation signal S4 is frequency-divided into a signal S5 having a 1/n (n is an integer of 2 or larger) in frequency by a frequency division circuit 5, and then the signal S5 is supplied to the phase comparison circuit 3.
The phase comparison circuit 3 compares the phase of the signal S2 as a reference frequency with the phase of the signal S5, thus obtained comparison output is supplied to a low-pass filter 6 to derive a DC (Direct Current) voltage having a level corresponding to the phase difference between the signals S2 and S5, and this DC voltage is supplied to the VCO 4 as a control signal.
In the normal state, therefore, the frequency of the signal S5 becomes equal to the frequency of the signal S2 so that the frequency f4 of the oscillation signal S4 is given by:f4=n/m×f1.
The frequency f4 of the oscillation signal S4 can therefore be changed by changing the frequency dividing ratios of m and n. If the oscillation signal S4 is used as a test signal, it is possible to check and adjust the reception frequency and intermediate frequency by using the frequency f4 of the oscillation signal S4 as a reference. As a prior art document, there is Japanese Laid-Open Patent Application No. OP2000-13336.